Technology Advances and Key Enablers for Module Integration for 5 nm

ended

In line with industry needs, Moore’s law, scaling in ITRS 2013/2015, and ECSEL JU MASP 2016, the main objective of the TAKEMI5 project is to discover, develop and demonstrate lithographic, metrology, process and integration technologies enabling module integration for the 5 nm node. This is planned with available EUV/NA0.33 scanners that are optimized for mix and match with existing DUV/NA1.35 scanners, and with system design and development of a new hyper NA EUV lithography tool to enable more single exposure patterning at 5 nm to create complex integrated circuits. Process steps for modules in Front-end, Middle and Back-end of line are discovered and developed using the most advanced tool capabilities and they are evaluated morphologically and electrically using a relaxed test vehicle. During the development, specific challenges in metrology are assessed and metrology tools are upgraded or newly developed. The results are demonstrated in the imec pilot line with qualified metrology tools at the 5 nm node. The TAKEMI5 project relates to the ECSEL work program topic Process technologies – More Moore. It addresses and targets, as set out in the MASP, at a (disruptive) new Semiconductor Process, Equipment and Materials solutions for advanced CMOS processes that enable the module integration of electronic devices for the 5nm node in high-volume manufacturing and fast prototyping. The project touches the core of the continuation of Moore’s law which has celebrated its 50th anniversary. The cost aware development process supports the involved companies, and places them in an enhanced position for their worldwide competition. Through their worldwide affiliations, the impact of the TAKEMI5 project will be felt outside Europe in America and Asia Pacific semiconductor centers and is expected to benefit the European economy a lot by supporting its semiconductor equipment and metrology sectors with innovations, exports and employment.