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Towards the neW era of 1.6 Tb/s System-In-Package transceivers for datacenter appLIcations exploiting wafer-scale co-inteGration of InP membranes and InP-HBT elecTronics

Sector: Broadband • Location: Greece, Netherlands, France, Sweden, Czechia, Israel

Source: EU Funding & Tenders Portal

Project
Ended

IoT, 5G and cloud applications have created a huge growth of datacentre traffic fuelling the market of 400GbE and the ratification of 800GbE and 1.6T standards expected within 2013-2025. Datacentre operators must keep pace with the increasing speeds and to cope with the increasing power consumption required for airflow management and cooling. Moreover, they must address the massive interconnectivi

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The project “Towards the neW era of 1.6 Tb/s System-In-Package transceivers for datacenter appLIcations exploiting wafer-scale co-inteGration of InP membranes and InP-HBT elecTronics” is an infrastructure initiative in the Broadband sector, located in Greece, Netherlands, France, Sweden, Czechia, Israel. Taiyo aggregates data on it from EU Funding & Tenders Portal.

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IoT, 5G and cloud applications have created a huge growth of datacentre traffic fuelling the market of 400GbE and the ratification of 800GbE and 1.6T standards expected within 2013-2025. Datacentre operators must keep pace with the increasing speeds and to cope with the increasing power consumption required for airflow management and cooling. Moreover, they must address the massive interconnectivity between servers and switches dictated by 5G ultra-low latency applications. 100Gb/s per lane is the next step for the realization of 800GbE modules but this will be the end of pluggables and the start of co-packaged optics with ASICs paving the way to 1.6T and beyond. TWILIGHT aims to bring InP membranes and InP-HBT electronics at unprecedently close distances (<20um) to unleash the speed capabilities of its high performance components and to enable 112Gbaud per lane. Wafer-scale bonding together with high-accuracy assembly and co-packaging concepts, TWILIGHT’s optoelectronic engines will be capable of up to 1.6T capacity. Selective area growth will be exploited to develop C-band and O-band EMLs and UTC photodiodes in combination with echelle gratings on the same system-on-chip platform. Adaptation of the SAG layerstack will be used to develop polarization insensitive SOAs enabling complex functionalities on chip. TWILIGHT will leverage analog bandwidth interleaving for interfacing its transceivers with next generation 112G SERDES and will develop analog (de)multiplexers, >110GHz linear drivers and 100GHz TIAs. TWILIGHT will exploit the PI-SOAs to develop 4x4 and16x16 optical space switches exhibiting nanosecond latency and >50% smaller footprint. The O-band and C-band SiP transceiver demonstrators leverage up to 72% and 74% power consumption savings compared to established technologies and target the datacentre market (2-10km) and DCI (<40km), respectively, with estimated cost 0.89€/Gb/s. Exploitation of TWILIGHT’s technologies is aimed via its industrial partner MLNX.

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