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CHIPS High - Throughput High - Resolution X - ray Laminography / Tomography System for Advanced Packaged Semiconductor Devices and Substrates

Bids closed Mar 2026 · Maryland · Last reported Feb 2026

Source: Maryland Purchasing Group

Tender
Closed

Amendment 0001 : Amendment changes include the following : The required response date is extended from February 26 , 2026 to March 9 , 2026No Statement of work changeQuestions and Answers : Question1 : Is there a cleanroom specification ? NIST Response : No . The instrument will be installed in a general purpose lab in

Status
Closed
Sector
Advanced Electronics
Location
Maryland, United States of America
Updated
3 Nov 2026
Source
Maryland Purchasing Group

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The tender “CHIPS High - Throughput High - Resolution X - ray Laminography / Tomography System for Advanced Packaged Semiconductor Devices and Substrates” is a tender record in Taiyo, linked to the Advanced Electronics sector. It is issued for works, goods, or services related to Maryland, United States of America.

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Not available for this record.

Status

Original status

closed

Taiyo status

Closed

Taiyo last update

2026-11-03

Contact

Not available for this record.

Description

Description

Amendment 0001 : Amendment changes include the following : The required response date is extended from February 26 , 2026 to March 9 , 2026No Statement of work changeQuestions and Answers : Question1 : Is there a cleanroom specification ? NIST Response : No . The instrument will be installed in a general purpose lab in the advanced measurement laboratory facility , but not within a cleanroom . Question 2 : Are you flexible on the footprint ( size / dimension ) NIST Response : NIST expects the analytical instrument ( source , stages , detectors , and shielded enclosure ) to fit within the footprint specified by 10 . 2 . Additional space is available in the lab around the instrument for service access , and for support equipment ( including chase space for air compressor / dryer if required , and a work area in the lab for control and analysis PCs ). Question 3 : Are the devices in JEDEC Trays ? NIST Response : Typically no . NIST requires significant flexibility to load samples that are within the size envelope described by specification 5 . Samples will include full wafers , coupons ( partial wafers ), individual or groups of packaged devices , as well as atypical sample geometries . To meet requirement 5 . 1 , vendors must include 5 sample carriers that are compatible with the automated loading system . Carriers supporting a JEDEC tray is only one possible way to meet that requirement . See Combined Synopsis Solicitation_1333ND26QNB030031 , Attachment 1 - Statement of Work , and Attachment 2 - Applicable Provisions and Clauses attachments for solicitation details .

Location

Country

United States of America (USA)

State

Maryland

Source

Source

Maryland Purchasing Group

URL

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Record type

Tender

Sector

Advanced Electronics

Article published date

2026-05-02

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